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FEATURES Accuracy Over Line and Load: 4.0% @ 25 C, 5% Over Temperature Ultralow Dropout Voltage: 300 mV (Typ) @ 300 mA Requires Only CO = 1.0 F for Stability anyCAP = Stable with any Type of Capacitor (including MLCC) Current and Thermal Limiting Low Shutdown Current: < 2 A 1.7 V VIN 6 V 2.8 V VCC 6 V VOUT = 1.2 V 5% -40 C to +100 C Ambient Temperature Range Ultrasmall Thermally Enhanced 8-Lead MSOP Package APPLICATIONS Notebook PCs Desktop PCs
IN VCC
Ultralow, IQ, anyCAP Low Dropout Regulator ADP3342
FUNCTIONAL BLOCK DIAGRAM
Q1 OUT
(R)
THERMAL PROTECTION PWRGD SD
CC gm
DRIVER
BANDGAP +
ADP3342
GND
REF -
GENERAL DESCRIPTION
3.3V
The ADP3342 is a unique member of the ADP330x family of precision low dropout anyCAP voltage regulators. The ADP3342 operates with an input voltage range of 1.7 V to 6 V and delivers a continuous load current up to 300 mA. In order to support the ability to regulate from such a low input voltage, the power rail to the IC, VCC, has been split off from the main power rail, VIN, from which the output is powered. The ADP3342 stands out from the conventional LDOs with the lowest thermal resistance of any MSOP-8 package and an enhanced process that enables it to offer performance advantages beyond its competition. Its patented design requires only a 1.0 F output capacitor for stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for spacerestricted applications. The dropout voltage of the ADP3342 is only 190 mV (typical) at 300 mA. This device also includes a safety current limit, thermal overload protection and a shutdown control pin.
VCC
ADP3342
VIN 1.8V 1F + IN IN OUT OUT + 1F VOUT 1.2V
SD PWRGD ON OFF GND
Figure 1. Typical Application Circuit
anyCAP is a registered trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002
ADP3342-SPECIFICATIONS
Parameter OUTPUT Voltage Accuracy Symbol VOUT
(VCC = 3.0 V, VIN = 1.8 V, CIN = COUT = 1 F, TA = 0 C to 100 C and TA = -40 C to +100 C, unless otherwise noted.)
Min -4.0 Typ Max +4.0 Unit %
Conditions VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V IL = 0.1 mA to 300 mA TA = 25C VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V IL = 0.1 mA to 300 mA, TA = -40C to +100C VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V TA = 25C IL = 0.1 mA to 300 mA TA = 25C VOUT = 98% of VOUTNOM IL = 300 mA IL = 200 mA IL = 100 mA VCC = 3 V, VIN = 1.8 V f = 10 Hz-100 kHz, CL = 1 F IL = 300 mA IL = 300 mA, TA = -40C to +100C IL = 300 mA, TA = 0C to 100C IL = 300 mA, TA = 25C IL = 200 mA IL = 0.1 mA IL = 300 mA SD = 0 V, VCC = 6 V, VIN = 1.8 V ON OFF 0 SD 6 V TA = 25C VCC = 6 V, VIN = 6 V TA = 100C VCC = 6 V, VIN = 6 V VPWRGD = 1.2 V, VCC = 3.0 V IPWRGD = 300 A IPWRGD = 300 A IL = 3 mA to 300 mA, COUT = 1 F to 10 F IL = 3 mA to 300 mA, COUT = 1 F to 10 F IL = 3 mA to 300 mA, COUT = 1 F to 10 F IL = 100 mA
-5.0
+5.0
%
Line Regulation Load Regulation Dropout Voltage VDROP
0.04 0.12
mV/V mV/mA
Current Limiting Output Noise OPERATING CURRENTS Ground Current in Regulation
ILIM VNOISE
190 125 70 450 60
450
mV mV mV mA V rms
IGND
VCC Current in Regulation Ground Current in Shutdown SHUTDOWN Threshold Voltage SD Input Current Output Current In Shutdown PWRGD Power Good Output Voltage
IVCC IGNDSD VTHSD ISD IOSD
3.0 3.0 3.0 2.0 100 100 0.01 VCC - 0.9 1.4 0.01 0.01 0.85 1.5
8.5 6.0 4.0 175 170 2
mA mA mA mA A A A V V A A A mA V V s s s
0.6 7 1 2
Power Good On Time Delay
IPWRGDL VPWRGDL2 VPWRGDH2 TD13 TD24
0.4 VCC - 0.4 5 50 0.05 300 300 1
Power Good Off Time Delay THERMAL PROTECTION Shutdown Temperature
TD35
THPROT
165
C
NOTES 1 Ambient temperature of 100C corresponds to a junction temperature of 125C under typical full load test conditions. 2 VPWRGDL, VPWRGDH,: Powergood output voltages. Guaranteed by design and characterization. 3 TD1: Delay time from VOUT crossing 1 V to PWRGD high. Guaranteed by design. 4 TD2: Delay time from SD high to PWRGD high. Guaranteed by design. 5 TD3: Delay time between SD low to PWRGD low. Guaranteed by design. Specifications subject to change without notice.
-2-
REV. 0
ADP3342
ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATION
OUT 1 OUT 2
8
Input Supply Voltage . . . . . . . . . . . . . . . . . . . -0.3 V to +13 V Shutdown Input Voltage . . . . . . . . . . . . . . . . -0.3 V to +13 V Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited Operating Ambient Temperature Range . . . -40C to +100C Operating Junction Temperature Range . . . -40C to +125C JA (2-layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157C/W JA (4-layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121C/W JC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56C/W Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering 10 sec) . . . . . . . . 300C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220C
*This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged.
IN
IN TOP VIEW VCC 3 (Not to Scale) 6 SD
7
ADP3342
GND 4
5
PWRGD
ORDERING GUIDE
Model
Output Voltage*
Package Option RM-8 (MSOP-8) RM-8 (MSOP-8)
Marking Code LJA LJB
Temperature Range 0C to 100C -40C to +100C
ADP3342JRM-REEL7 1.2 V ADP3342ARM-REEL7 1.2 V
*Contact the factory for other output voltage options.
PIN FUNCTION DESCRIPTIONS
Pin No. 1, 2 3 4 5 6 7, 8
Mnemonic OUT VCC GND PWRGD SD IN
Function Output of the Regulator. Bypass to ground with a 1.0 F or larger capacitor. All pins must be connected together for proper operation. Supply Voltage Ground Pin Power Good. Used to indicate output is in regulation. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shut down is not used, this pin should be connected to the input pin. Regulator Input. All pins must be connected together for proper operation.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3342 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
-3-
ADP3342-Typical Performance Characteristics
1.25 1.24 VOUT = 1.2V VCC = 3V OUTPUT VOLTAGE - V
1.23 VIN = 1.8V VCC = 3.0V 1.22
GROUND CURRENT - A
120 110 100 90 80 70 60 50 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 INPUT VOLTAGE - V IL = 0 A VOUT = 1.2V VCC = 3V
OUTPUT VOLTAGE - V
1.23 1.22 1.21 1.20 IL = 200mA 1.19 1.18 1.17 1.7 IL = 300mA IL = 0mA
1.21
IL = 100mA
1.20
1.19
1.18
2.7
3.7 4.7 INPUT VOLTAGE - V
5.7
1.17 0 50 100 150 200 OUTPUT LOAD - mA 250 300
TPC 1. Line Regulation Output Voltage vs. Supply Voltage
TPC 2. Output Voltage vs. Load Current
TPC 3. Ground Current vs. Supply Voltage
3.5 3.0
GROUND CURRENT - mA
VIN = 1.8V VCC = 3.0V
OUTPUT CHANNEL - %
200mA
GROUND CURRENT - mA
1.0 0.9 0.8 0.7 0.6 0.5
0
5.50 5.00 4.50 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0 -40 IL = 0mA -20 0 20 40 60 80 JUNCTION TEMPERATURE - C 100 IL = 100mA IL = 200mA IL = 300mA VCC = 3.0V VIN = 1.8V
2.5 2.0 1.5 1.0 0.5 0 0 50 100 150 200 OUTPUT LOAD - mA 250 300
0.4 0.3 0.2 300mA 0.1 0 -0.1 -0.2 -0.3 -0.4 0 25 50 75 100 125 150 -50 -25 JUNCTION TEMPERATURE - C
TPC 4. Ground Current vs. Load Current
TPC 5. Output Voltage Variation vs. Junction Temperature
TPC 6. Ground Current vs. Junction Temperature
GROUND CURRENT @ 300mA LOAD - mA
0.25
7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -40 -25 -10 MIN TYP MAX
INPUT-OUTPUT VOLTAGE - V
VCC = 3.0V VIN = 1.8V
INPUT/OUTPUT VOLTAGE - V
6 5 4 3 2 1 0 -1 -2 0 200 400 600 TIME - s 800 1000 VOUT = 1.2V SD = VIN RL = 4
0.20
0.15
0.10
0.05
0 0 50 100 150 200 OUTPUT LOAD - mA 250 300
5 20 35 50 65 TEMPERATURE - C
80
950
TPC 7. Dropout Voltage vs. Output Current
TPC 8. Ground Current @ 300 mA Load vs. Ambient Temperature
TPC 9. Power-Up/Power-Down
-4-
REV. 0
ADP3342
0
VOUT - V
VOUT - V
VOLTS
1.32 1.22 1.12
VCC = 3V CL = 1 F RL = 4
1.32 1.22 1.12 3.00
VCC = 3V CL = 10 F RL = 4
1.3 1.2 1.1 VCC = 3V VIN = 1.8V CL = 1 F
VIN - V
3.00
VIN - V
400
mA
1.80
1.80
200 5
0
40
80 120 TIME - s
160
200
0
40
80 120 TIME - s
160
200
0
400
800 1200 TIME - s
1600
2000
TPC 10. Line Transient Response
TPC 11. Line Transient Response
TPC 12. Load Transient Response
0
SD - V PWRGD - V OUTPUT - V
VOLTS
1.3 1.2 1.1 VCC = 3V VIN = 1.8V CL = 10 F
VIN = 1.8V 1.2
2.0 1.0 0 3.0 0 1.8 0 -200 200 600 1000 TIME - s
VOLTS
0
VCC = 3V RL = 4 VIN = 1.8V
400
1.0 0.5 0
mA
200 5 0 400 800 1200 TIME - s 1600 2000
A
0
200
400 600 TIME - s
800
1000
1400
1800
TPC 13. Load Transient Response
TPC 14. Short Circuit Current
TPC 15. Power-On/Power-Off Response from Shutdown
SD - V PWRGD - V OUTPUT - V
SD - V PWRGD - V OUTPUT - V
2.0 1.0 0 VCC = 3V VIN = 1.8V RL = 4
OUTPUT - V
2.0 1.0 0 VCC = 3V VIN = 1.8V RL = 4
2.0 1.0 0
VIN = 1.8V SD = 3.0V RL = 4
3.0 0 1.8 0 0 100 200 300 TIME - s 400 500
3.0 0 1.8 0 2 6 10 TIME - s 14
VCC - V
3.0 0 200 600 1000 1400 TIME - s 1800
18
TPC 16. Turn On Delay
TPC 17. Turn Off Delay
TPC 18. Power-On/Power-Off Response from VCC
REV. 0
-5-
ADP3342
-20
VIN - V PWRGD - V OUTPUT - V
VOUT = 1.2V CL = 1 F IL = 300mA CL = 1 F IL = 50 A
70 CL = 10 F IL = 300mA 60 50 40 300mA 30 0mA 20 CL = 10 F IL = 50 A 10 0
-30
1.2 0 3.0 0 1.8 0 0 200 400 600 TIME - s 800 1000 VIN = 1.8V SD = 3.0V RL = 4
RIPPLE REJECTION - dB
-50 -60 -70 -80 -90 10
RMS NOISE - V
-40
100
1k 10k 100k FREQUENCY - Hz
1M
10M
0
10
20 CL -
30 F
40
50
TPC 19. Power On/Power Off Response from VIN
TPC 20. Power Supply Ripple Rejection
TPC 21. RMS Noise vs. CL (10 Hz-100 Hz)
100 VOUT = 1.2V IL = 1mA
1.25
650
VOLTAGE NOISE SPECTRAL DENSITY - V/ Hz
10
1.23
OUTPUT VOLTAGE - V
CL = 10 F
0mA 50mA 100mA
ICL - mA
550 600
1
CL = 1 F
1.21
0.1
1.19
200mA 300mA
0.01
1.17
0.001 10
1.15
100 1k 10k 100k 1M FREQUENCY - Hz
35
55
75
95
115
135
155
175
500 1.5
1.6
AMBIENT TEMPERATURE - C
1.7 1.8 VIN - V
1.9
2.0
TPC 22. Output Noise Density
TPC 23. Thermal Protection
TPC 24. Current Limit vs. VIN
VCC - V
3.6 3.0 VIN = 1.8V SD = 3V
400
mA
200 0 5 15 25 TIME - ms 35 45
TPC 25. Current Limiting from VCC
-6-
REV. 0
ADP3342
THEORY OF OPERATION
The new anyCAP LDO ADP3342 uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier.
INPUT Q1 VCC COMPENSATION CAPACITOR PTAT VOS R4 OUTPUT ATTENUATION (VBANDGAP /V OUT) R3 D1 (a) RLOAD R2
APPLICATION INFORMATION PC Application--VCCVID
R1 CLOAD
The ADP3342 has been optimized for PC applications that require a 1.2 V output for powering the voltage identification rail, VCCVID. The rail from which the output draws current, the IN pin, is separated from the rail that powers the IC, the VCC pin. This allows a higher efficiency design when, as recommended for the IMVP-3 application, the VCC pin is connected to a 3.3 V supply to power the IC adequately, and the IN pin is connected to a 1.8 V supply. The efficiency is nearly 60% in this case.
Capacitor Selection
NONINVERTING WIDEBAND DRIVER
gm
PTAT CURRENT
ADP3342
GND
Figure 2. Control Loop Functional Block Diagram
A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input "offset voltage" that is repeatable and very well controlled. The temperature proportional offset voltage is combined with the complementary diode voltage to form a "virtual bandgap" voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1 and a second divider consisting of R3 and R4, the values can be chosen to produce a temperature stable output. This unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and ESR of the load capacitance. Most LDOs place very strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. With the ADP3342 anyCAP LDO, this is no longer true. It can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. This innovative design allows the circuit to be stable with just a small 1 F capacitor on the output. Additional advantages of the pole splitting scheme include superior line noise rejection and very high regulator gain which leads to excellent line and load regulation. Additional features of the circuit include current limit and thermal shutdown and noise reduction.
As with any voltage regulator, output transient response is a function of the output capacitance. The ADP3342 is stable with a wide range of capacitor values, types and ESR (anyCAP). A capacitor as low as 1 F is all that is needed for stability; larger capacitors can be used if high output current surges are anticipated. The ADP3342 is stable with extremely low ESR capacitors (ESR 0), such as multilayer ceramic capacitors (MLCC) or OSCON. Note that the effective capacitance of some capacitor types may fall below the minimum at cold temperature. Ensure that the capacitor provides more than 1 F at minimum temperature.
Input Bypass Capacitor
An input bypass capacitor is not strictly required but is advisable in any application involving long input wires or high source impedance. Connecting a 1 F capacitor from IN to ground reduces the circuit's sensitivity to PC board layout. If a larger value output capacitor is used, then a larger value input capacitor is also recommended.
Power Good Monitoring Function
The PWRGD pin does not monitor the output voltage directly, but rather detects whether the internal PNP pass transistor is being modulated by the regulation loop. This means of detecting PWRGD, rather than using a voltage threshold detection, provides an inherent and desirable delay in asserting the PWRGD signal. During startup or overload, the regulation loop is not in control, so the PWRGD pin is low.
Shutdown Mode
Applying a TTL high signal to the shutdown (SD) pin or tying it to the input pin, will turn the output ON. Pulling SD down to 0.4 V or below, or tying it to ground will turn the output OFF. In shutdown mode, quiescent current is reduced.
Paddle-Under-Lead Package
The ADP3342 uses a patented paddle-under-lead package design to ensure the best thermal performance in an MSOP-8 footprint. This new package uses an electrically isolated die attach that allows all pins to contribute to heat conduction. This technique reduces the thermal resistance to 110C/W on a 4-layer board as compared to >160C/W for a standard MSOP-8 leadframe.
Thermal Overload Protection
The ADP3342 is protected against damage due to excessive power dissipation by its thermal overload protection circuit which limits the die temperature to a maximum of 165C. Under extreme conditions (i.e., high ambient temperature and power dissipation) where die temperature starts to rise above 165C, the output current is reduced until the die temperature has dropped to a safe level. The output current is restored when the die temperature is reduced.
REV. 0
-7-
ADP3342
Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, device power dissipation should be limited by operating conditions so that junction temperatures will not exceed 150C.
Calculating Junction Temperature
Assuming ILOAD = 300 mA, IGND = 4 mA, VIN = 1.8 V and VOUT = 1.2 V, device power dissipation is:
PD = (1.8 - 1.2) 300 mA + (1.8 ) 4 mA = 187 mW
Device power dissipation is calculated as follows:
PD = (V IN - VOUT )I LOAD + (V IN )I GND
Where ILOAD and IGND are load current and ground current, VIN and VOUT are input and output voltages respectively.
TJA = 0.187 W x 110 C W = 20.6C
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Micro SOIC (MSOP) (RM-8)
0.122 (3.10) 0.114 (2.90)
8
5
0.122 (3.10) 0.114 (2.90)
1 4
0.199 (5.05) 0.187 (4.75)
PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27
0.028 (0.71) 0.016 (0.41)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS. INCH DIMENSIONS ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
-8-
REV. 0
PRINTED IN U.S.A.
C02712-.8-1/02(0)
The proprietary package used in the ADP3342 has a thermal resistance of 110C/W, significantly lower than a standard MSOP-8 package. Assuming a 4-layer board, the junction temperature rise above ambient temperature will be approximately equal to:


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